Klimasauskas GroupTM
Leading the Edge in Emerging Technologies

HomeApplicationsNewsFeedbackSite MapAboutArticles & PapersRecipes

Home > Applications > Semiconductor
 |  Semiconductor Manufacturing Applications

One of the challenges in modeling the performance of semi-conductor equipment is modeling the impact of maintenance activities on equipment performance. Performing too much maintenance can have just as negative an impact on equipment performance as the wrong or insufficient maintenance.


Semiconductor Equipment Maintenance

Working with the staff of a Digital Equipment Corporation, one of our staff developed a method for representing maintenance events as input to a neural network. This technique was specifically applied to a plasma etch machine. It enabled the successful modeling of key parameters of Etch Rate, Standard Deviation, and Selectivity. The resulting neural network models were integrated into a Dynamic Hill Climbing optimizer to suggest different tactics for maintenance activities that would restore the equipment to an acceptable level of operation.

Our key contribution was conceptualizing a method for representing maintenance events. This led to the ability to effectively model the process. This is an example of the kinds of innovative solutions that our staff can provide.

Behavoral Synthesis

Behavioral Synthesis is technology that allows a chip designer to describe an algorithm in C++ using a class library (such as SystemC) and translate that into an intermediate form that can be used to create a gate-level net list for fabrication. The class library provides a mechanism to implement hardware specific constructs such as ports, registers, and memories.

At Forte Design Systems, one of our staff developed a series of synthesizable random number generators that provide trade-offs in area, latency, and quality of the random numbers generated. Other work included developing a series of optimizations that reduced area and latency for certain algorithmic constructs. These optimizations include enhanced expression balancing (including loop carry dependencies), global switch optimization, and numerous peep-hole optimizations.

Other Applications

In other applications, our staff were key contributors in the development of a high-density optical disk storage system, micro-processor development systems, and automated printed circuit board (PCB) layout systems.

Selected Publications

The following two publications describe the specific modeling solution and the broader application.
  • Klimasauskas, C. (2000), Analyzer for modeling and optimizing maintenance operations, US Patent Number 6,110,214. Assigned to Aspen Technology.
  • Card, Jill P., Sniderman, Debbie L., Klimasauskas, Casimir (1997), Dynamic Neural Control for a Plasma Etch Process, IEEE Transactions on Neural Networks. Volume 8, Number 4. May 1997.

Send mail to with questions or comments about this web site.
All rights reserved. Updated: 02/27/2007 .